1. Field of the Invention.
The present invention relates generally to semiconductor circuit fabrication, and more specifically to a method for fabricating a resistive load element in polycrystalline silicon.
2. Description of the Prior Art.
In integrated circuit fabrication, some digital circuits require a resistive load. An illustrative circuit which requires such a resistive load is an NMOS static random access memory (SRAM).
The term resistive load is used to mean elements which provide a resistance to the flow of electrical current. The voltage drop across such element is not generally required to vary precisely linearly with current in digital circuits. Resistive load elements have been fabricated from Field Effect Transistors (FET) having their gates tied to their drains. Back-to-back diodes have been used to create an element formed of two junctions defining regions having alternating conductivity types. Since some current must flow through a resistive load element, the reverse-biased diode of the pair must be "leaky."
As is known in the art, introducing additional high temperature process steps to the fabrication of an integrated circuit is generally undesirable. High temperature processing causes diffusion of the impurities dopants in the integrated circuit, causing junctions to move. Low temperature processing steps, those below approximately 700.degree. C., generally do not adversely affect the integrated circuit being fabricated. Other steps, such as growing silicon dioxide (SiO.sub.2) may require temperatures of 900.degree. C. or more. Such high temperature steps cause dopant diffusion, which is undesirable, especially in later processing stages. It is generally desirable to minimize the number of such high temperature process steps during the fabrication of an integrated circuit.
It would be desirable to provide a semiconductor fabrication process which provides back-to-back diodes suitable for use as resistive load elements. It would also be desirable for all of the process steps necessary to fabricate such resistive load elements to involve only low temperature processing steps.